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Analysis And Implementation Of ECC Algorithm Used In Memory Reinforcement

Posted on:2016-05-21Degree:MasterType:Thesis
Country:ChinaCandidate:F J LiFull Text:PDF
GTID:2308330461990136Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
System integrated on a single chip become more and more complex because of the development of integrated circuit industry. The capacity of memory such as SRAM and FLASH needed in the system is also growing, the size of process is decreasing because of the continues development of integrated circuit process, which lead to the failure of the semiconductor transistorthe and system.In the aerospace industry, the memories are easy to appear SEU because the semiconductor transistors are vulnerable to the impact of space radiation and energetic particles. Semiconductor transistors are also vulnerable to the electromagnetic radiation in the industrial and civilian field. The anti-jamming capability of the circuit in the same radiation environment become weaker because of the operation voltage decrease as a result of the requirement of low power,which lead to the increase of probability of MBU(Multiple Bit Upset). At this time reinforcement method for single event upset will no longer work, ECC codes which used to correct MBUs play an important at this moment. It is proved that using Error Control Code in the memories which is susceptible to outside interference can improve the chip reliability whether in aerospace industry or civilian field.The article first introduces the development background of ECC, describes the various memories, analysis the structural and error mechanisms of SRAM and FLASH, raises the importance of adding ECC. Secondly, give a research of ECC algorithm used in memory reinforcement, introduces the basic theory of error control code——Galois field, including Hamming code used to correct single error, BCH code used to correct multiple bit error and RS code. The article analyse the construction method for BCH code and RS code, the encode and decode method of BCH and RS code.Finally, with using matlab and VCS simulation for different methods of encode an decode, built Verilog module of BCH code in the FPGA platform which can correct triple errors.
Keywords/Search Tags:ECC, Memory Reinforcement, BCH code, RS code
PDF Full Text Request
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