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Design And Validation Of Beidou Ⅱ Navigation Baseband Signal Processing Chip Prototype

Posted on:2016-05-31Degree:MasterType:Thesis
Country:ChinaCandidate:W J JiaFull Text:PDF
GTID:2308330461956939Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the opening of the BeiDou second generation satellite navigation system in operation, our country will going to a new era of independent satellite navigation. At the same time, navigation application system user machine chip will have a prospect and bright market. Because the navigation chip development cycle is long, the cost is high and the baseband signal processing performance directly determines the performance of the BeiDou navigation and positioning receiver chip, so researching the prototype of the satellite navigation system chip of BD-2 has a significant meaning.The important part of this dissertation is researching and analyzing of capturing and tracking. Firstly, based on researching of the traditional methods of capturing, we propose the segmented matched filtering capture algorithm combined with tang detector, the algorithm consist of the basic principle of algorithm, tang detection threshold setting and the analysis of the signal to capture the performance of the algorithm. Through studying on the basic principle of the phase-locked loop, we use the 3rd order phase-locked loop aided 2nd order frequency lock loop to tracking the carrier frequency. Using the 2nd order delay phase-locked loop with carrier auxiliary to tracking the code loop. We can make use of the MATLAB software to check the result of capturing and tracking. At last, we test and verify the design scheme at DSP and FPGA development platform. The result proved that the design of BD-2 satellite chip is available. It has a great significance for reaching on the subsequent chip.
Keywords/Search Tags:Satellite navigation system, BD-2, Capture, Track, FPGA
PDF Full Text Request
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