Research And Implementation On The Fast Capturing Algorithm For High Dynamic Satellite Navigation Signal

With the widely application of the US GPS navigation system,many different global satellite navigation systems are sequentially developing constantly.At present,satellite navigation positioning system has been popularized and applied in many aspects of social life,and especially more attention is paid gradually on the high-speed moving target positioning.So how to meet the needs of high dynamic and how to locate the high dynamic target accurately is the emphasis in high dynamic research field.However,signal capture is the foundation to complete the work of satellite navigation positioning,so the speed to capture satellite signals has directly impact on the work efficiency of navigation positioning system.The capture of high dynamic satellite navigation signal has become a research hotspot in global satellite navigation positioning system.This dissertation mainly researches the fast capture algorithm of satellite navigation signals.Firstly the research background and the significance are introduced and research status of fast capture for satellite navigation signals is reported.Taking the GPS receiver as an example,the system components,the characteristic of the signal and the receiver structure are introduced.Then the basic capture principle in the receiver is analyzed and the fast capture algorithm of satellite navigation signals in high dynamic is deeply researched.For the issue of the long capture time using traditional capture method,a fast capture algorithm including down-conversion,data preprocessing,matched filter and Tong detector is provided after analyzing the matched filter and Tong detector and gives the precise verified process after capturing signal.Compared with the traditional capture,the capture speed has been greatly improved.The capture accuracy is high and the false alarm probability is low.The results show that the proposed scheme can capture fast high and accurately dynamic satellite navigation signals.For the hardware design,the sub-module programming and system overall implementation use Verilog and C.FPGA of Virtex5 series XC5VLX155 chip implement the entire capture system,and DSP of C6000 series TMS320C6415 chip verify the capture signal to reduce the probability of false alarm.FPGA and DSP complete the capture unit core module implementation in receiver signal processing.