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Design And Implementation Of Semi-passive HF Analog Front End RFID Tag Chip

Posted on:2015-02-09Degree:MasterType:Thesis
Country:ChinaCandidate:K YaoFull Text:PDF
GTID:2308330452955731Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Nowadays, RFID (Radio Frequency Identification) technology has been widelyapplied in various fields as supply chain management, transportation, retail industry,logistics and access control. And, as the developing of IOT (internet of things) and WSN(wireless sensor network), RFID tags combined with sensors become a growing trend forRFID technology. Passive tags, however, are hard to meet the requirement of more powerconsumption for tags combined with sensors. Semi-passive are powered by a battery andbe sufficient to provide power for more power consumption part. Thus, semi-passiveRFID tags have wide range of application prospects in the future. In this paper, researchand implementation of analog front end (AFE) of HF (High Frequency) semi-passiveRFID tags are presented.Firstly, operating principles of the HF semi-passive RFID tag are demonstrated andanalysis of its key performances is conducted including its performances of recognitiondistance and working life. Besides, system architecture of the HF semi-passive RFID tagis constructed in this section.Next, key circuits in AFE of HF semi-passive RFID tags are studied and designed.The output voltage and power consumption of NMOS gate-cross connected bridgerectifier are discussed. And sequence detecting wake-up circuit and energy detectingwake-up circuit are introduced. ASK10%and ASK100%demodulation circuits aredesigned according to the theoretical basis of ASK demodulation. Subcarrier modulationmethods are demonstrated and modulation circuit is implemented.With the mentioned analysis and techniques, an AFE of HF semi-passive RFID tagscompatible with ISO/IEC14443Type A standard is designed and implemented in HHNEC0.13μm CMOS technology. Simulation results show that the designed AFE hasrealized much longer recognition distance than passive tags and100pW ultra-low power consumption of wake-up circuit in sleep mode. The designed AFE was fabricated withHH NEC0.13μm CMOS technology with its layout area of416μm×472μm. And theAFE chip was also measured with FPGA based digital baseband. Measurement resultsshow that this AFE can successfully demodulate the ASK100%signal and the AFE’smodulation depth of the signal towards the reader can achieve16.4%. This chip metdemands of a HF semi-passive RFID tag and can be applied in HF semi-passive RFIDtags.
Keywords/Search Tags:HF RFID, Semi-passive, Wake-up circuit
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