Font Size: a A A

Acquisition Technology Research And FPGA Implementation Of High Sensitivity Gnss Receiver

Posted on:2016-08-18Degree:MasterType:Thesis
Country:ChinaCandidate:S K QuFull Text:PDF
GTID:2298330467992611Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
Along with technological development and economic growth in China, the application of Global Navigation Satellite System (GNSS) has spread from professional military filed to ordinary civilian field. The demand of application under complicated situation have caused a upsurge research on High-Sensitivity (HS) receiver technology in recent years. The core of High-Sensitivity capture technology is to make the receiver can capture the weak signal instead of traditional receivers.This paper is about acquisition key technologies studies of GNSS receiver. In this paper some methods that can improve the sensitivity of capture technology have been proposed. The feasibility of these methods have been verified through the simulation experiment and an acquisition system on FPGA development platform is implemented. The main research contents are as follows:First of all, it leads to a general introduction of GNSS system and analyzes the characteristics of the satellite signal. Meanwhile, it elaborates the communication theories of the receiver and makes a thorough introduction of the main function modules for hardware and software structure of the GNSS receiver.Secondly, through researching the theory of the receiver capture technology, it proposes an acquisition algorithm that can achieve "multi matched filter+FFT". Then it analyzes elaborately the acquisition performance, detection strategy, relevant parameters and the function of each module. Furthermore, it provides the external interfaces with acquisition module in engineering implementation.Thirdly, by studying the method to improve the receiver capture sensitivity and ameliorating the existing algorithms of down-sampling filter and the non-correlation accumulation, it puts forward half-chip strategy and the approaches of CIC down-sampling filer and differential coherent accumulation, promoting the sensitivity by1-2dB.Lastly, as for the capture module of Numerical Controlled Oscillator and the time-frequency two-dimensional research, it lists the strategies for the FPGA engineering implementation and verifies the hardware and software synergistic emulation in the acquisition module design. At last, it introduces the display console interactive interface of GNSS receiver.
Keywords/Search Tags:GNSS receiver, acquisition, high-sensitivity, CIC-filter, FPGA design
PDF Full Text Request
Related items