Research And Implementation Of Edge Detection Method Marr Based On FPGA

Edge detection in digital image technology is the first important step of imagesegmentation, computer vision and pattern recognition, The detected edge quality directlydetermines the effect of the latter part of high-level image processing such as featureextraction, target matching, image measurement and target identification. Design computingcircuit to realize curing algorithms and computing parallelization can greatly improve thecomputing speed of the algorithm. In these solutions, FPGA-based edge detection algorithmcan be designed flexibility, able to meet people of image processing equipmentminiaturization, low-cost requirements, has a good prospect of application.Firstly, this article studied the current situation of FPGA processing digital image edgedetection, and analyzed the basic structure of FPGA, FPGA design flow, chip selection,QUARTUS software and the using of VERILOG HDL, Marr and edge detection algorithmsstudied. Next, the paper Marr FPGA edge detection algorithm system was designed tointroduce the system design of hardware accelerators and shared resources of arbitration,designed Marr edge detection accelerators, including: Marr computational design, implementaddress generating unit Marr machine interface design, Marr control state machine design.Finally, the paper carried out experimental research results Marr edge detection algorithm toverify the correctness and effectiveness of the test range Marr edge detection algorithmaccelerator design.Design paper edge detection algorithm based on FPGA accelerator, as compared to theexisting FPGA edge detection scheme in image processing quality has been greatly improved,the control flow design phase of the system to consider the data flow control, making thecircuit design more rational modify more convenient. Compared to traditional PC and DSPplatforms in real-time has a greater advantage of being able to meet the requirements ofreal-time video processing and is suitable for more applications.Thesis ensure real-premise, effectively improving the quality of the image edgedetection of FPGA technology embedded image processing applications in a usefulexploration.