Broadband Zero-if Transceiver Front-end Research And Design

With the rapid development of modern wireless communication technology, different objects have different communication needs. Software-defined radio thought is put forward with times and the habits of users. It requires the establishment of a unified standardized platform. Zero-IF architecture is simple and AD/DA is close to the antenna. It’s not only the development of a superheterodyne institutions, but also the application of software-defined radio thought. Zero-IF architecture with the small size, low power, low cost advantage, has been widely used in the mobile communications now. Many chip vendors have launched Zero-IF transceivers for mobile communication standards. For radar applications, Multifunction phased array radar needs thousands of channels, while the advantages of Zero-IF architecture are on the highlights out. Based on this application background, one research and design of the broadband Zero-IF transceiver front-end is achieved based on FMC (FPGA Mezzanine Card) standard.This paper mainly done:1. Study the structure of the main transceiver front-end and analyze their strengths and shortages. Depending on the application context, choose the Zero-IF architecture.2. Describe the transceiver RF front-end technical indicators. Based on the performance indicators, the overall design scheme is proposed. The selection of suitable chips is based on the performance parameters. Receiver channel selectivity system simulation, gain budget simulation, the output signal spectrum simulation are conducted.3. Complete the hardware design of the broadband Zero-IF transceiver front-end, including the design of local oscillator module, quadrature modulator module, quadrature demodulator module, AD/DA module and interface of core chips, etc. Elaborate the points of RF PCB design.4. Testing the broadband Zero-IF transceiver front-end board, all modules perform well. Test its IQ amplitude and phase imbalance.