Key Technologies Research On Broadband Zero IF Amplitude And Phase Compensation Based On FPGA

With the rapid development of software radio technology, the simple hardware circuit, low-power zero-IF receiver is receiving increasing attention. However, there is serious DC offset and analog quartered amplitude-phase inconsistency problem in zero-IF receiver. In this context, based on the existing theory, DC bias and analog quartered amplitude phase inconsistencies digitally compensated to eliminate the interference signal and the DC signal and I/Q mismatch by FPGA.This paper describes the work as well as the currently facing problems of zero-IF. Then study the compensation algorithm of DC offset and I/Q amplitude-phase inconsistencies, respectively simulated single-frequency, dual-frequency signal, and chirp signal, proved its effectiveness on a single frequency signal. This implements the down converted signal into the FPGA, and then passed to computer through PCI Express, calculate the I/Q data obtained compensation parameters, compensation parameters passed to FPGA, realized I/Q data compensation in the FPGA, and finally transport compensated signals by optical fiber.This study provides a zero-IF receiver solution for the DC offset and I/Q amplitude and phase inconsistencies in compensation, and compensation parameters through the program PCI Express transmission, and optical fiber communications. Experiments show that the scheme can meet practical engineering applications.