The Research Of Frequency Offset Estimation And Phase Recovery Algorithm For 100Gb/s Optical Coherent PM-QPSK Receiver

The rapid development of high bit-rate services in communication networks has instantly demanded a much higher bandwidth of core transmission links in WAN, inter-province and international networks. The upgrade from the existing 10G/40G optical transmission to 100G has been a trend. The research in recent years indicates that systems with phase modulation and coherent detection are the most promising, of which PM-QPSK gets most recognition.The PM-QPSK lowers the symbol rate as 1/4 of bit rate, which provide high spectrum efficiency, and the transceiver structure of PM-QPSK is simpler and so is easier to realize. Besides, with digital algorithms, the electrical Digital Signal Processing (DSP) in the receiver can flexibly compensate the channel distortion caused by dispersion, carrier frequency offset and phase distortion. Since the phase distortion caused by frequency and phase offset between LO and carrier is one of the main distortions in PM-QPSK, frequency offset compensation and phase recovery act as two of the core modules.With the support of National 863 Project "Research of the Key Technologies of 100Gb/s Optical Coherent Transmission Systems", this thesis mainly focuses on the research of the digital algorithms of carrier frequency offset compensation and carrier phase recovery in the receiver of PM-QPSK system. And the main contents are as follows.1. Investigation of PM-QPSK structure, mainly on the receiver DSP structure, including function of the several modules in this part. Designing and implementation of the Matlab simulation platform for the back-end of PM-QPSK receiver.2. Analysis on the carrier frequency offset estimation algorithms, designing of the parallel structure of the algorithms in order to break the restriction of hardware speed, with feasibility testified by simulation. Designing of the parallel structure of the 4th power method. Designing of BA-PADE (BER-Aided Pre-decision-based Angle Differential Estimator) based on BER feed-back to break the exact initialization restriction of traditional PADE. Designing of a parallel operation scheme based on PADE, namely Grouped-PADE. Feasibility of both the forementioned scheme testified by simulation.3. Analysis on the carrier phase recovery algorithms, designing of the parallel operation scheme in order to realize phase recovery in 100Gb/s PM-QPSK with current FPGA or DSP, with feasibility testified by simulation. Designing of the optimized and the parallel structure of Viterbi-Viterbi (V-V) method, and binary fixed-point simulation of parallel V-V together with frequency offset algorithm, the result proved that the scheme could observably lower the request to the hardware operation speed.