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Acceleration Mechanism Research On Communication-aware Network-on-Chip

Posted on:2015-03-31Degree:MasterType:Thesis
Country:ChinaCandidate:T P AiFull Text:PDF
GTID:2298330467951324Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
Moore’s law indicates that in the future computers will usher in the era of multi-core, with the increasing number of compute nodes or memory nodes integrated on the chip, the traditional on-chip interconnect technology is difficult to meet the future demand. Network-on-Chip is a kind of high bandwidth and good scalable interconnection architecture, so it gradually becomes the mainly communication architecture between multi-core. On chip network’s communication delay has great influence on the performance of system-on-chip, how to reduce the communication delay has been a very important research topic.When the real application runs in the network-on-chip, network’s communication is uneven because of application’s behavior. Reducing the busy traffic can greatly reduce the average delay of a network. Therefore, based on the characteristics of network, the study of reducing the average latency of network by accelerating the busy traffic can improve the performance of system on chip significantly.The main work and achievements are as follows:1. This paper combines the flit-based virtual circuit switching and wormhole mechanism, and proposes a new hybrid switching mechanism. The virtual circuit part can provide acceleration for the busy traffic, and the traditional wormhole mechanism supports the transmission of normal packets. Reserving VCs for busy traffic and improving the previous work can make the busy communication packets’routing pipeline reduce greatly, thus reducing the latency at every hop, and thereby reducing the average delay network.2. This paper analyzes the network’s communication, and proposes a method of judging the busy communication. According to the communication temporal locality, this paper uses a time window to predict the future status of network’s communication.3. This paper presents two strategies to establish the accelerate channel. One strategy considers the network’s communication from a global view, and it can find the busy traffic accurately. The other considers the network’s communication from a local view, the implement of it is easy.4. The experiment shows that the distributed strategy used for constructing the run-time accelerate channel can reduce the average network latency by17.4%. The centralized strategy used for constructing the run-time accelerate channel can reduce the average network latency by18.6%.5. The acceleration mechanism is proposed in this paper is applicable to networks which has uneven communication. For example, graphics computing programs often require frequent communication, so the research results of this paper also has very high practical value.
Keywords/Search Tags:network-on-chip, communication prediction, run-time accelerate channel, locality
PDF Full Text Request
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