Design And Realization Of DPD Based On FPGA

Power amplifier is the key components which affects the performance ofcommunication system; its inherent nonlinear characteristics will bring system many issuessuch as high error bit rate, band spectrum expansion and so on. In the new transport system,such as3G, LTE system, since the peak average power rate of output signal is very high,the traditional linearization method doesn’t meet the requirements. In order to keep thepower amplifier linearity and efficiency, it has important significance to research highpower amplifier linearization technology for high speed wireless communication.Compare with other power amplifier linearization method, digital predistortion hasbecome the most widely used power amplifier linearization techniques, since its goodreal-time, high linearization capacity, high integration and other advantages.This paper first introduces the nonlinear of power amplifier, current power amplifierlinearization index. Firstly, through the introducing of memory and unmemory model tolearn the usual power amplifier model, and it focus on common linearization techniquesincluding the principle of adaptive digital predistortion (DPD). Secondly, this paperanalyzes the adaptive algorithm of polynomial digital predistortion. Through thesimulation of memory polynomial in matlab; it laid the realization foundation in FPGA.Finally, this paper presents an implementation of digital predistortion based on FPGA, andit focus on discussing the implementation principles of several important functionalmodules such as: PD modules, forward/feedback data capture module, MB module, etc.The test results on the remote radio unit platform show that the adaptive digitalpredistortion can compensate the nonlinearity of high power amplifier effectively, reducesthe signal adjacent channel power rate values, and improve the real-time of the system.