Research And Implementation Of Optimization Encryption Algorithm On FPGA

With the advent of the21st century and the rapid development ofinternet technology, network security becomes more and more significant.Cryptography and cryptographic algorithms are the core technology ofinformation security. Security of the Cryptographic algorithms determinesthe strength of information security. And its performance will determinethat the information security will play a role to protect and promote theinformation process, rather than hindering the information process.Therefore, the optimized implementations of cryptographic algorithms willbe an important research direction in the field of information security.Firstly, this paper describes the most famous cryptographic algorithmsand their optimization methods in detail. Secondly, FPGA platforms haveunique advantages on concurrent computing. This paper presents anoptimized method of AES algorithm which is based on FPGA platform.The main work of this paper is divided into two parts:First, the ExpandedKey operation of AES algorithm will be designedas a pipeline to reduce the delay of each pipeline for the purpose ofaccelerating AES.Secondly, this paper uses the internal and external pipeline structureto get the result of accelerating AES. The structure has21stages ofpipeline and uses the space to substitute for the time.Finally, these two powerful simulation software which are calledModelsim and QuartusII gives some experimental results of the optimizedimplementation. After comparison with the results of other similar designs, we can conclude that the optimized implementation of AES algorithm hasa better overall performance and a good reference value for practicalapplication of AES.