A Large Capacity Signaling Time Slot Cross System Research And Design

High capacity signaling convergent cross device is aims to dispersed in a plurality of E1timeslot signaling cross to a designated time slot to a signaling collection device, with a smallamount of input, E1signal can be connected to large capacity, in the signaling collectioncompleted large capacity, this thesis adopts FPGA of AppliedMicro company and Latticecompany’s CPU programmable logic chip LFE3-70E to realize the design of E1interface linkhigh capacity signaling convergent cross equipment based on.Based on the E1frame structure and the mapping relation of E1frame, research design andimplementation of hardware and software system based on the embedded processor APM86791,using APM86791and FPGA as the core signal processor design convergence devices of highcapacity signaling link E1interface. Analysis of E1-TDM flow, using the maxim E1interfacechip DS26518as the fender E1signal interface chip, NuMicro MINI51series microcontrollerM017as the control chip, the allocation of work is completed by using E1interface chip SPI buscommunication protocol, completed the E1board design, E1board with hot plug function, foursections carrying can be configured according to the needs of single equipment, maximum E1signal access capacity reached128road.Completed the APM86791peripheral hardware circuit design and the underlying hardwaredriver interface program development based on embedded system, hardware design of CPUhigh frequency of1Ghz, memory DDR3SDRAM data memory for the1Gbit, set up Linuxembedded open source operating system on the hardware platform, the development of timeslotcrossing configuration application, the use of HTML language WEB visualization interface,making the equipment management and timeslot crossing configuration has a more humanfriendly man-machine interface;Using Verilog language for the hardware logic design, complete the FPGA chip LFE3-70Etime slot cross logic design based on Lattice time slot interchange may according to need toplace the E1slot128*128cross exchange; then research and analysis of EMI/EMC system leveldesign and PCB board level, guarantee the system stability and reliability, the system researchmore implementation feasibility; implements the E1interface and large capacity link signaling, complete signaling time slot cross, convergence and other functions, with the signalingcollection equipment, the slot convergence function, can greatly reduce the signaling collectionequipment investment cost. Through the test and analysis of signaling convergence crossequipment design, combined with the actual engineering application, verify the design schemeto achieve the goals set.