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The Hardware Implementation Of BP Neural Network In Image Recognition

Posted on:2015-05-01Degree:MasterType:Thesis
Country:ChinaCandidate:X ZhangFull Text:PDF
GTID:2298330434960756Subject:Circuits and Systems
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Along with the information technology goes ahead day and nightly, and the moderndigital technology becomes more and more perfect, the image recognition technology hasbeen widely used. It is far away from the daily application requirement the image recognitionby computer sotfware realized when rapidly development of mobile electronics,embeddedapplication of extreme expansion. Although image recognition technology based on computersotfware is perfectly. More and more challenges needed to face in the applications of imagerecognition. It is simple and easy to implement that traditional algorithm such as templatematching and wave-let transform, but it is not deliberately in solving complex image, havedefaced or a clutter image. So, it is particularly important to research BP neuralnetwork algorithm in the complex image recognition. It is also more and more widely usedin the ifeld of image recognition. And it has outstanding performance when BP neuralnetwork was used as classifier. It has become a major trend in the ifeld of image recognitionthat BP neural network was used to identiyf the image.In the past10years, It is has been rapidly extended to more and more ifelds, includingdigital image processing from the previous communication ifeld, that FPGA has thecharacteristics of lfexible design, parallel computing, good portability. There are manycorrectly simulation result and theoretical study about BP neural network based on FPGA torealize image recognition. And a lot of the hardware implementation of the algorithm optimiz?ation theory. But there still are not BP neural network based on FPGA for image recognition.So it is very necessary to design BP neural network implementation based on FPGA.Atfer a variety of neural network algorithm was studied to optimize algorithm. A BPneural network implementation scheme based on FPGA was proposed in the dissertation. Ithas a very long time that the BP neural network was applied to image recognition as the oneof the most widely used neural network. There are various kinds of improved learningalgorithm appeared with the development of neural network training algorithm. It was alsoresearched and explored by many researcherss, but it is fewly that hardware-realized BPneural network to solve the concrete problems of image recognition.In order to realize the hardware circuit of BP neural network, the whole thesis is compo?sed by three modules. In the ifrst module,it was introduced that the development status of theneural network and image recognition. And summarized that the neural network theory and s-everal of improved algorithm. In the second module, the speciifc problem that is the peopleface image recognition of driver fatigue monitoring system of BP neural network needed tosolve was puted forward to deal with the flexibility of BP neural ’networks application. Theformation of neural network parameter of the specific problems was determined through theMatlab simulation. And optimized the hardware algorithm, and the simulation results are obt-ained, form a complete can be used to model hardware according to the parameters.Finaly,A completely model was formed that can be used to image recognition of dirverfatigue monitoirng system. In the third module,the BP neural network was devided intoseveral hardware modules accauding the processes of hardware implementation that wasanalysised rfom the two aspects of qualitative and quantitative. It was designed respectivelythat BP neural network’s airthmatic units:16bit multiplier module,accumulator module,thetirgger function of sigmoid, and the tirgger functio’ns deirvative dsigmoid module.Airthmatical unit design of the module veirifcation was designed by analyzing each module a-lgoirthmanalysis of preferential, hardware environment. The forward operation control functi?ons of neurons,the output layer neurons reverse operation control function and the hiddenlayer reverse operation control function had been designed. The hidden layer and output layernonronc KoHr?Qllinrrr?r*prc?tirin unit anrl^n?*1\7cicin(7tVt户working process of theneurons.The hardware BP neural network module BP net was finishedby instantiates which functional modules was aready realized.It is diiffculty to directly implemented in hardware in the current expeirment environme?nt because that neural network designed and implemented the occupy more resources. Sothe network can only be veirfied and training-tracking in the sotfware environment. In theend,simulation is carried out to verify the design of BP neural network BP net. At the sametime, the hardware implementation of the BP neural network wave form was simulated.The network training function and results veirfy function was realized by design dataexchange function of the simulation’s process.
Keywords/Search Tags:BP Neural Network, FPGA, Fatigue Monitoring, Hardware Algorithm
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