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Basic Research Of Chaotic Encryption System Based On FPGA And PSoC

Posted on:2015-02-17Degree:MasterType:Thesis
Country:ChinaCandidate:W L LiuFull Text:PDF
GTID:2298330434459154Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
With rapid development of information technology and computer network t echnology, the requirement people have raised is more and more rigor for communication security, therefore, information encryption technology is more and more important. Chaos encryption is a nonlinear encryption technology, which is developing rapidly in recent years. The technology depends on the characteristics that chaotic system is extremely sensitive to initial conditions and is high random, and the advantages that it’s noise-like, continuous broadband and unpredictable for a long time, so chaotic system is especially suited to being applied to secrecy communication and other field. Currently research abroad in chaotic secure communication is relatively mature, however, in domestic a lot of research work has been done in the field, but most stay at the software level, there exits the problem of being easily stealed and vulnerable. However, the encryption based on the hardware layer is performed in dedicated hardware, and the encryption information is stored in special equipment. As a consequence, compared to the software encryption technology, hardware encryption is more safe and reliable.Aiming at problems of vulnerability of software encryption and difficult development of hardware encryption, two hardware implementation scheme about chaotic secure communication is designed and realized in this paper which is based on FPGA and PSoC in the in the digital domain and the analog domain. According to the function and application of the system designed, this paper is divided into three systems, as shown below:(1) Chaotic encryption simulation system. To verify the feasibility and the rationality of the logic design of the encryption system, firstly the preliminary experiment is carried in FPGA development board. Produce the known data, by timing sequence analysis and logic building, and after simulation verification and logic analyzer test, encryption data is all correct, and multiple signals of system are synchronized, illustrate that this design scheme has applicable value. Consequently, the test is carried in the digital field and the analog field, the encryption is realized for LED dot matrix and the audio signal.(2) Encryption system for LED dot matrix in digital domain. The scheme uses Logistic chaotic mapping to generate chaos sequence, takes PSoC to control the tri-color LED display. The scheme realizes the functions of chaos sequence generation, synchronous control, LED display information encryption and decryption through FPGA.(3) Encryption system for autio analog signal. The scheme uses linear feedback shift register (LFSR) to generate chaos pseudo-random sequence and takes PSoC to finish A/D, D/A. The scheme realizes the functions of chaos pseudo-random sequence generation, synchronous control, audio encryption and decryption through FPGA.In the last place, the above three system performance is made test and analysis using test instrument logic analyzer, oscilloscope, or PC software LabVIEW.The experimental results indicate that the system realizes the function of encryption and decryption for LED dot-matrix and audio by chaos.
Keywords/Search Tags:chaotic secure communication, FPGA, PSoC, audio, LEDdot-matrix, encryption and decryption, LabVIEW
PDF Full Text Request
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