Design And Realization Of Digital Screening Algorithm On FPGA

Digital screening technology is the core of prepress, which primarily determines the quality and efficiency of a printing system. With the pursuit for high definition image growth and the resolution of printing device increasing, the speed of screening algorithm faces greater challenge.This paper introduced the process of prepress which is closely related with screening, discussed printing theory and the factors affecting the quality of screening result, on the basis of which, the problems of traditional amplitude modulation screening were analyzed, and solutions were presented; several algorithms of frequency modulation screening were discussed. The error diffusion algorithm was determined as the subject investigated of this paper by comparing the advantages and disadvantages of each algorithm.Error diffusion algorithm is appealing due to its brilliant screening effect, while complicated computing slows down the efficiency to process image. To maintain the screening quality and accelerate the process at the same time, this paper migrated error diffusion algorithm which usually operates on computer into FPGA platform. Through deep investigation on error diffusion algorithm, this paper proposed parallel process approach, which, with the advantage that FPGA computes in parallel, used multiple parallel computing elements to process more than one pixels simultaneously. The simulation results showed that this new algorithm was far faster than any of the screening algorithms running on computer. By adding or reducing the parallel computing element, the cost and speed of a design with this new algorithm could reach best balance. One of the innovations in this paper was designing a parallel process approach to realize error diffusion algorithm. Moreover, creating a structure suitable for error diffusion algorithm running on FPGA was another innovation.