Design&Implementation Of Real-time And Low-power For The ARM Interrupt Controller IP

With the improvement of living standards, the state health services in rural areasalso will change the traditional pattern.Portable and remote real-time medical servicesystem will become an important means in the future, so research and development ofvarious types of mobile medical equipment and chip becomes particularly urgent.With the increase of chip complexity, interrupt controller serves as the hub of chip areconnected to the external device and the CPU, bear the task is more and moreimportant,its performance will directly affect the performance of the entire system. Afully functional interrupt system, can greatly improve the ability of computerprocessing events, improve efficiency and the real-time property. Interrupt controllerin this project research is based on low power mobile medical monitoringsystem,which is one of indispensable important modules.This subject adopts the top-down approach to complete the design of interruptcontroller IP, in order to enhance the interrupt controller versatility and portabilitywhich use AMBA AHB bus interface. It can realize32different types of interrupt,provides a vector registers for each interrupt source, ensure whenever there is onlyone interruption in executive processing. To meet the needs of practical applications,interrupt controller provide16interrupt priority level, besides, to avoid maliciousaccess in some occasions and improve safety, which also configure a variety of workmode. For give the interrupt controller upgrade space, providing extended interruptinterface, supporting the daisy chain structure. In the design in order to meet therequirements of real-time, which made the most stringent constraints to the timingsequence,using a single clock network, avoiding apply compound trigger.When accomplish the design of interrupt logic unit and the interrupt priority, theinterrupt controller code was written with Verilog HDL, functional simulationverified by Modelsim and Debussy, meanwhile, verification of the feasibility is usedby Xilinx’s FPGA. Integrated tool uses Design Compiler which is made in Synopsys,including environmental constraints, at the same time, the interrupt controller usingestability methods and low-power design, save the cost of test and reduse the powerconsumption. Finally, synthesized, layouted and routed by using the SMIC0.18μmCMOS process and complete the interrupt controller layout.At50MHz operating conditions, the test results: dynamic power is3.6884mW,the worst situation for complete one interrupt operation only needs0.7μs, which meet the requirements of real-time and low power consumption.