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Design Of Online Digitized UPS Based On The Embedded System

Posted on:2014-10-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y P LiFull Text:PDF
GTID:2298330422968262Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
With the introduction of intelligent controller chip into the research field of UPS,Embedded technology and DSP, FPGA programmable devices, which haveadvantages in algorithm adjusting, process controlling and peripheral driving, haveplayed an significant role in the UPS. SPWM modulation technique being applied toUPS maturely, the UPS hardware circuit structure is promoted to the direction ofminiaturization and digitization. As a strong performer in the field of digital circuit,DSP and FPGA take the place of the dominant position of dedicated SPWM chip inthe UPS system undisputedly. Based on this background, the design of an embeddedonline digital UPS is proposed and then completed.After analyzing basic structure and universal realization methods of online UPS,the paper proposes a definite design of UPS hardware circuits based on the minimumsystem constituted by DSP and FPGA. In order to give full play to their respectiveadvantages, FPGA assumes the task of controlling most hardware circuit, so that theDSP can concentrate on running the system regulating and controlling algorithm. Inthis way, the power supply quality of UPS can achieve a very high level.According to the technical specifications, the paper establishes all the hardwarecircuits and software solutions of online UPS. Firstly, input of electric supply passesthrough boost power factor correction circuit, during this procedure, three functions ofrectification, boost and power factor correction can be realized simultaneously. Thenthe boosted DC voltage passes through the H-bridge inverter circuit composed of fourIGBT and reaches the amplitude requirements of electric supply, thus eliminating thecomplex process of designing the output transformer. At the same time, due to theapplication of the SPWM modulation technique, the parameters of elements in thefilter circuit after H-bridge output are greatly reduced, thus achieving the systemminiaturization, low cost and good performance.In the software design, FPGA shares a large number of hardware operations, sothis paper avoids multiple interrupt control method which is commonly used today.only one interrupt subroutine is utilized to achieve SPWM modulation method ofinverter output, battery charge and discharge. Therefore, the fast operation ability ofDSP can be given full play, and real time and reliability of control algorithms are improved, then a probable platform is provided for superior algorithms.
Keywords/Search Tags:UPS, FPGA, DSP, High-power, Digitized
PDF Full Text Request
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