| In automatic test and control equipment research and development, with theincreasing amount of information, but also increasingly lightweight portable device,needs of high-capacity, high-speed and small-volume data storage technology ismore and more urgent. Traditional storage media technology is mature, but alsoflawed capacity, speed or volume terms, while the Micro SD card with largecapacity, small size and high rate advantages, and hot-swappable, write protection,data encryption, and some excellent features, universal in consumer electronicsapplications. In this thesis, automatic testing with major hardware platforms indigital control system design based on FPGA, FPGA-based design of the Micro SDcard controller applied the Micro SD card with high-capacity high-speed, smallsize advantage to automatic testing and control of industrial in order to provide newstorage solution.In this thesis, the main achievement is the4-bit SD bus mode logic design ofMicro SD card controller based on SD Card3.0specification and the support forthe UHS-I speed mode. First, according to the application requirements and designprinciples, design the overall structure of Micro SD card controller, based on top-down modular design approach, the controller module is divided into threecategories includ ing physical layer interface module, the basic functions of themaster module and core processes module: physical layer interface module includesa command sent, the response read data read, data write and so on, in order torealize the physical layer function of Micro SD card communication; basic functionmanagement module realizes the function management of controller, includingclock management, CRC checksum and other basic functional modules; coreprocess control module is the control center of the entire controller, calling eachphysical layer interface module or basic functional modules for data reading andwriting tasks in real time according to user commands. On this basis, this thesisfocus on the achievement of key design UHS-I speed mode, including real-timeswitching voltage, speed, mode conversion and data sampling and synchronizationand timing constraints. The main use of dynamic phase alignment technology andphase selection method is to achieve a data sampling and synchronization of MicroSD card. Fina lly, in the bottom-up testing methods, we simulate and debug thetiming of each module and further joint commissioning simulation debugging, thentest the functions and indicators. Test results show that the design of FPGA-based Micro SD card controller supports SD card3.0specification, supports the latestSDXC types of me mory cards (capacity up to64G), supports for4-bit SD bus mode,and supports the mode the UHS-I speed mode, the data read and write speeds areabout35MB/s, data transmission through the CRC is stable and reliable.The Micro SD card controller studied and designed in this thesis has clearstructure. It is easy to use, stable and reliable. It is able to provide new storagesolutions for automated test and control, and played the Micro SD card advantageof small volume, high-capacity and high-speed data storage. |