Font Size: a A A

Design And Optimize Quantum Reversible Logic Circuits

Posted on:2015-06-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y C LiFull Text:PDF
GTID:2298330422484646Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Energy consumption is a difficult issue in low power circuit design. Although a highlevel of integration and using the new fabrication processes have greatly reduced the energyconsumption over the last decades, an demonstration put forwarded by R. Landauer in theearly1960s, is that irreversible hardware design will lead to energy dissipation because of theloss of information. Bennett showed that the reversible circuits, which only use reversiblegate to design, would not lose any energy theoretically. Thus, reversible logic becomes moreattractive as a new focus of next technology. Reversible circuits are of high interest in opticalcomputing, nanotechnology and quantum computing.Based on the analysis of leading features of quantum reversible logic and the existingcircuits, this paper completes some novel structures as follows:(1) A novel fault tolerant quantum reversible full adder and fault tolerant reversible BCDadder are proposed.This paper provides three fault tolerant reversible gate-ZPL gate、ZQC gate、ZC gate.ZPLG gate can implements fault tolerant quantum reversible full adder singly amd the ZCgate can implements fault tolerant half quantum reversible full adder singly. This paper alsoproposes a novel fault tolerant quantum BCD adder on the basic of proposed fault tolerantreversible gates and the existed quantum gate. And some researches and applications aboutthe Design Theory and Technology of Quantum logic devices and the extracting method ofparameter in quantum adders are also carried out in this paper.(2) A novel quantum reversible BCD subtraction and an optimized reversible ALU whichimplements more operations is more are proposed.Other new reversible gate called RGZ gate is designed, which implements not onlyquantum adder but also quantum subtraction. Based on this gate and some existed reversiblegates, a novel BCD adder is designed. Meanwhile, an optimized new ALU is proposed in thispaper and it will make contribution to the realization of reversible programmable LogicDevice (RPLD) in future using reversible ALU.(3) A novel quantum reversible full adder and subtraction, and BCD adder andsubtraction are proposed.This paper uses six approaches to implement the reversible BCD adder/subtraction. Sixapproaches provide more choise for the need in different performances. And the sixapproaches have different performances. At last, the performance analysis of the proposedreversible BCD adder/subtraction is given.
Keywords/Search Tags:reversible logic, fault tolerant reversible BCD adder, quantum BCD subtraction, quantum BCD adder and subtraction, garbage outputs
PDF Full Text Request
Related items