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The Design And Realization Of EDMA Controller In X-QDSP

Posted on:2014-06-14Degree:MasterType:Thesis
Country:ChinaCandidate:Y Z ZhangFull Text:PDF
GTID:2298330422473766Subject:Software engineering
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Currently, multi-core DSP is DSP technology trends. The article is based on aheterogeneous multi-core DSP chip(X-QDSP) that is designed independently. X-QDSPconsists of four DSP cores and one RISC core, supports high-speed fixed-floatingoperations, and provides multiple peripheral interfaces, eg: Enhanced Directed MemoryAccess(EDMA)/External Memory Interface(EMIF)/Multi-channel Buffer SerialPort(McBSP)/Graphics acceleration component and so on. EDMA controller is the keycomponent to control the transfer of data between multiple cores and peripherals,designing and implementing EDMA to meet the need of high-speed transmission forMulti-core DSP become the main research contents.1. An In-depth studying the structure and performance requirement of X-QDSP,through analyzing the operating principle of EDMA, which is designed to meet the needof X-QDSP and completed the functional definition and detailed design of eachsub-modules.2. Each DSP core has two general channels, general channel comprises a logicchannel and a physical channel. Logic channel is in charge of launching EDMA, andsupports the parameter connection、channel link and parameter RAM updating. Physicalchannel is used to generate read and write commands, separate read and writecommands, adopt parallel control mechanism and use pipeline in read and write access.3. EDMA bus system has8buses, the bus structure adopts dual buses that read andwrite buses are separated. Each of the high-speed devices with128bit wide has specialbus, slow devices with32bit wide have shared bus. The strategy of arbitration use fixedpriority+Token-Ring rotation to arbitrate the request that comes from SMC, universalchannel and private channel.4. The EDMA verification is from two respects: module-level and system-level.The module-level focus on the realization of EDMA internal logic. System-levelverification pays more attention to systematic relations between EDMA and otherperipherals. By analizing functions of EDMA and coverage of statistics make sure thethoroughness of verification.Proven, the function of EDMA is correct. In worst environment, the synthese resultshows that its work frequency can reach500MHz, the power is235.8mW, and the cellarea is1229368um2.
Keywords/Search Tags:EDMA, Heterogeneous Multi-core DSP, Bus Arbitration, Design
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