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Research Of Heterogeneous Multi-core High-speed Interconnection Technology Based On AMBA Bus

Posted on:2013-12-15Degree:MasterType:Thesis
Country:ChinaCandidate:H W HuFull Text:PDF
GTID:2298330392468001Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the rapid development of semiconductor technology and embeddedtechnology, as well as the widely used of Java technology, Many advatages of Javamake it more widely applied in embedded systems. However, the run of Javaprograms need to use Java virtual machine(hereinafter referred to as the JVM) andbase class library, therefore,it limits the speed of Java program running in embeddedsystems, at the same time, the Java runtime environment and the base class libraryneed to take up many system resources, it limits the performance of Java programgreatly with the limited resources of embedded system.Because of these limitations, some academics and businesses develop the Javaprocessor to substitute the JVM to improve the Java programs implementationefficiency, such as picoJava processor by Sun company, Java OptimizedProcessor(hereinafter referred to as JOP) by Martin Sehoeberl and so on, Javaprocessor is a hardware implementation of Java virtual machine. At present, how toimprove the execution performance of Java program in embedded exploitation,domestic and foreign research mainly focus on making the Java processor integratedinto embedded systems, constituting a heterogeneous multi-core system withuniversal core to implement.This paper through to research the AMBA(Advanced Microcontroller BusArchitecture) bus, LEON3microprocessor system and JOP core, proposing the“heterogeneous multi-core high-speed interconnection based on AMBA bus”technology. This paper through to design a AMBA bus interface of JOP core basedon state machine model, making JOP core integrated into LEON3microprocessorsystem, implementing a heterogeneous multi-core system based on AMBA bus. JOPcore used to execute Java applications, LEON3used to perform other commonprograms, The two processors implement high-speed interconnection through AMBAAHB(Advanced High-performance Bus) bus.Finally, the paper use the Xilinx ISE12.4software and ModelSim SE6.5simulation software to simulate and test the interface memory read operation,interface memory write operation, interface serial port read operation, interface serialport write operation and interface serial port status register respectively, verifying the correctness of the interface accomplish communication. And using Xilinx’s Xpowerpower analysis tool to test the overall power consumption of the system, andcompared to multi-core LEON3system power consumption, verifying the low-powerdesign of heterogeneous multi-core structure based on AMBA bus.
Keywords/Search Tags:Embedded, JOP core, AMBA bus, heterogeneous multi-core, LEON3microprocessor system
PDF Full Text Request
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