Research On The Implementation Of High-Speed RS Decoder And The Soft-Decision Decoding Algorithm

Reed-Solomon (RS) codes are a kind of non-binary BCH code which has a strong error correction capability. They are very effective on correcting random and burst errors, so they are widely used in communication and data storage systems to enhance the reliability of systems and its application covers the fields ranging from deep space communication to digital video broadcasting. Considering the widely application of RS codes and the urgent needs for high speed data transmission in all fields, the application of mobile communication and satellite communication in extremely rugged channels and the practical needs to face informationalized military conflicts in complex electromagnetic environments. It is significant and valuable in both theory and application to study the hardware implementation of RS high speed decoder and the soft decision decoding algorithm which can improve RS coding gains. Based on the two aspects illustrated above, the main work and contribution of the essay is as follows:1. Compare and analyse the advantage and disadvantage of BM algorithm and Euclid algorithm when implement in hardware. Construct the simulation platform for RS code decoding based on Euclid algorithm, which is the basis of hardware testing and debugging for RS decoder. Accomplish the testing and verifying of the function of the platform.Then, accomplish the circuit design of the unit and module of high-speed RS decoder. Setting the implement of RS(255,239) as an example, test and verify the output of every module with the result of the simulation platform, and introduce the structure of parallel flow line in order to increase the throughput capacity of the RS decoder.3. Aiming at the drawback of ME algorithm based RS decoder, present an area-efficient implementation of ME block, and apply this area-efficient ME block to the implementation of RS(255,239) decoder for reducing the hardware complexity and chip area. Simulation and test result shows that the decoder based on this improvement can achieve the designed function and its throughput reaches6.4Gbps while its hardware complexity is widely reduced.4. It is obvious that there is few research on GF(4096) based RS codes than those based on GF(256). The performance of RS codes based on GF(4096) is discussed in this paper. Comparing GF(4096) based RS codes with the bit error rate of BPSK, the simulation results show that RS codes based on GF(4096) have a strong capability of correcting random and burst errors. GF(4096) based RS codes have performance gains over those based on GF(256) when they have same rate at the BER of10-6. Considering its better performance, an high-speed implementation of RS(4095,3935) decoder is introduced.5.Study the influence of different damping coefficient of external message and variable node message when message updates in ABP algorithm. Simulation results focus on decoding performance and average iteration times in different code rate Aiming at the high complexity of Gauss elimination, introduce the SABP-Chase algorithm which has lower complexity and parallel operation structure.