Design Of Embedded Digital Watermarking System Based On LDOC Code

Digital watermarking is the technology which can embed the identificationinformation directly in a digital carrier but does not affect the use value of the originalcarrier and can’t easily be perceived or noticed by human perception system such asvisual or auditory system. The basic idea is that scrambling and encoding the importantinformation then embed in the frequency domain (DCT transform or wavelet transform)of a host media in order to achieve the purpose of hidden information without changingthe visual effect of the host media. The design is based on FPGA as hardware platform，adopt DCT transform and LDPC codes as technical support，data flow is controled byNios_II soft core， at last， we realize the watermarking system on chip whichperformance and speed are both excellent.LDPC (Low Density Parity Check Code) is one of the most excellent code，thecode has a strong anti-interference ability, and with the increase of the length and rate,its performance will greatly improve. it becomes to the channel coding standard of thefourth generation communication system (4G) because of the performance close toshannon limit of the transmission，because of these advantages，introducing LDPCcodes to the digital watermarking system can greatly improve the anti-interferenceability and the transmission speed of the system. The paper uses FPGA to realize LDPCencoding and decoding algorithm，according to the features of the Verilog language,this paper selects the "π rotation matrix construction method" to encode，and the "Queenalgorithm" is better to avoid the appearance of cyclotella in H matrix．The "UMPBP-Based algorithm" is used in decoding，we use the Q8(fixed-point) format to expressdecimals，this method avoids floating-point arithmetic, so, it greatly improves theefficiency of the algorithm. Based on the Q format，this paper puts forward the conceptof using the hardware description language (Verilog) to realize complex algorithms，andalso describes the LDPC encoding and decoding algorithm with the method of statemachine. The program does not use any IP core，so the hardware module of Verilogapplies to any FPGA.In order to improve the robustness of digital watermarking and reduce thetransmission error, digital watermarking technology combined with the LDPC coding.The system uses Nios_II as the core, composed of the touch screen, SD card and otherperipheral components. Both embedding and extracting of watermark are provided, we can carry out various operations on the pictures in SD card. In terms of software, thehost image uses DCT transform to realize time-frequency transform, and the watermarkimage is processed by Amold transform and LDPC coding, which will enhance theperformance of the watermark further, The host and watermark image is embedded andblind extraction based on R coefficient, flexibility is much better. We use the Verilog torealize LDPC codes, the algorithm hardly even involves fractional arithmetic, so it cangreatly improve the execution speed of program, the system almost realized thecharacteristic of real-time.