Designing And Implementation Of Portable NTP Tester

With the rapid development of modern society in various fields of national defense, economy, industry, communications, electricity, the accuracy and precision of time requirements are high. The network timing has become an important means of time transfer. Among them, the network time server plays an important role in the network timing. The new production NTP time server must go through rigorous testing and calibration, which can be put on the market, otherwise the timing accuracy of untested NTP time server will be biased. In addition, the NTP server generally requires long hours of work, while a number of external or internal factors will reduced its performance, and affect the timing accuracy. Therefore, in order to avoid the potential risk by timing deviation, it is very urgent to use the development of a tester testing the NTP time server NTP timing accuracy. The traditional NTP tester is bulky, high power consumption, which can not meet the environment of the use of electricity, telecommunications, military exercises. Therefore, developing a portable tester NTP would have the performance of portable, stable operation in variety of environments, and test effectively NTP time server time accuracy.This paper presents a combination of ARM + FPGA system architecture design.The system mainly has a ARM microprocessor core, a FPGA co-processor, a GPS /BDS timing module, a network controller module, RS232 serial port, a LCD touch screen and other peripherals. The development work will be completed by using the embedded technology, modular design concept.We solve the network communication,the data high-speed parallel communication between heterogeneous processors,implement precision local clock in hardware, accurate records of NTP timestamps,human-computer interaction and many other difficult issues.The paper mainly describes the research and work for the NTP portable tester:(1)Introducing the NTP time server timing principle, highlighting NTP protocol,client / server model to work and some relevant technology about development work.(2) It describes the system hardware design, focusing on ARM, FPGA how to deal with the division of things Service, data communication between processors, and Complete hardware schematics and PCB board design.(3)The paper highlights the workflow uC / OS-II real-time operating system migration, human-machine interaction module, the local clock module, network tasks module, and data processing module,which completed the development of the system software debugging tasks each module(4)Designing related experiment is to test the system performance, by the existing comprehensive testes Time-Acc007 compared with the system. Finally the performance of system testing is better than accuracy of 2μs.