The Research Of Smart Industrial Camera System Based On FPGA

With the development of social economy, the requirements for performance of smart industrial cameras are becoming higher and higher in industrial production field.This project is devoted to the research of high performance smart industrial cameras based on FPGA. The unique hardware structure of the FPGA makes it suitable only for simple image pre processing, so improving and transplanting of some image processing algorithms combining with FPGA is the key to improving the performance of smart industrial cameras.This paper analyzes the key technology of high performance smart industrial camera based on FPGA platform, puts forward a set of design scheme of smart industrial camera and successfully developes a prototype of micro smart industrial camera. The prototype uses 3 million pixel CMOS Sensor and high performance, low power Cyclone Ⅳ series FPGA chip, it has a power consumption of less than 1W. Successfully controls the image data flow and drives the SDRAM by programming with Verilog HDL in FPGA and in the SDRAM reading and writing module, the paper puts forward a kind of semi ping-pong operation mechanism, which can avoid the occurrence of the frame interlaced and ensure the integrity of the frame reading picture. The USB2.0 chip works in slavefifo mode, its transmission speed is close to 40MB/s, which is close to the highest transmission speed of USB2.0. This paper puts forward a smart industrial camera debugging analysis software based on MFC architecture and realizes the video preview, screenshots and other functions, which provides a platform for the follow-up research about the smart industrial camera.In order to get RGB image from the Bayer image, this paper puts forward a full gradient interpolation algorithm which is more suitable for realization in FPGA after comparison of the bilinear interpolation algorithm and gradient correlation algorithm. This paper realizes the above three algorithms skillfully using pipelining processing with FPGA’s IP core. Experiment results show that the full gradient interpolation algorithm get a better reduction effect with less hardware resource usage than the gradient correlation algorithm. The paper improves the low illumination enhancement algorithm for getting rid of floating point,realizes the improved algorithm using pipelined processing, which makes full use of the advantages of parallel processing of FPGA.The last experiment result proves that the improved algorithm is effective and real-time. In order to realize the edge detection algorithm, this paper converts the color image to gray image firstly. Then realizes the Sobel edge detection algorithm by using the IP skillfully in FPGA. The paper shows experimental results of different threshold Sobel edge detection finally.Finally, we test the prototype of the smart industrial camera, its video is smooth, image is clear and it can work stably for a long time, which meets the actual demand. The improvement and implementation of the typical image algorithm based on the prototype can be used as a reference for more complex image algorithms’implemention on FPGA, which has a high theoretical significance and application value.