The Research Of Multi-channel High Frequency Signal Acquisition And Storage Based On FPGA

Ultrasound medical equipment in the display method variety, non-invasive, painless,especially cardiovascular viscera of hemodynamic and detect a unique feature of human tissue, are widely used in all aspects of the clinical diagnosis. Average commonly used high frequency ultrasonic frequency band is focused on the 3.5—7.5 MHz, in this frequency ultrasound medical equipment has been used very widely at home and abroad,.More than 20 MHZ uhf ultrasonic relative to the general ultrasonic, can better show the tiny lesions in shallow and small tubular structure of pathological changes, and the frequency of ultrasonic equipment is research is not much, so the system research of20 MHZ uhf ultrasonic acquisition and storage are important academic and application value.In view of the ultra high frequency ultrasound to the need of large data of high speed acquisition and storage, this topic has been designed a multi-channel high frequency signal acquisition and storage systems based on FPGA. this paper based on Altera StratixIV platform, Was Received real-time two piece of high speed AD9254 collected ultrasound data, by DDR2 as the large capacity cache, Was used its own PCI Express core, through the Qsys Quartus12.1 architecture to be built a high speed data acquisition and storage system, Based on. DMA read and write data to system memory for subsequent processing The system main work are as follows:first of all,The part of front-end acquisition, with interval cross sampling technique by the two parallel AD9254, Having been achieved the effect of sample frequency doubling by using relatively low speed conversion chips,the data was analyzed with Matlab was obtained accurate sampling data.The second, The part of back-end storage, DDR2 SDRAM as the main external cache system, forward to be accepted after the data of reorganization and asynchronous FIFO, backward to be based on the architecture of Qsys, PCIe hardcore was ran for high-speed DMA transfers. DDR2 SDRAM high-speed reading and writing was verified by the Modelsim software, eliminate the physical delay of chip itself was achieved good bandwidth by 200MByte/s for write and read.The third, the basic framework of the Jungo corporation WinDriver was Combined,PCIe driver codes were writed to build a DMA StratixIV interface as test platform,verified the PCIe hardcore DMA literacy rate was reached an average of 1455 MB/s, andthe PCIe physical test software was used to tested 5.0 GT/s ideal transmission bandwidth.The last, Based on the verification of each function module for final total system debugging, by the way of the collect data was firstly read by HOST by DDR2 SDRAM stored and then the data were writed back in the original address of DDR2 SDRAM,the system’s transmission was verified and archived data accurately by the tests. After the debugging, this system was successfully realized the function of transferring High-speed ADC sampling data to the store domain of the HOST and storing these data.System has the following innovation:(1) In the back-end storage system,the SGDMA of high speed transmission control function was formatted with modules into independent IP,and then was integrated into the new frame of the Qsys from the Quartus11.0,It was communicated for data with the front DDR2 SDRAM and terminal PC to be implemented the efficient data transmission and the module of storage system who can be The effect of transplanted.(2) the bandwidth of the back-end storage system is Significantly higher than the front acquisition part,the timeliness of the front-end acquisition board was determined by computer programming, a period of data we can choose will be stored briefly into DDR2 SDRAM as a fixed storage,Also it can be used as a real-time collection and storage systems,It’s the convenience for the 32 bits system for that a large number of data is resolved in a timely manner.The success of the operation, for the system’s extension of the collection and storage to the 8 channels,16 channels,64 channels or even 128 channels were laid a good technical foundation. At the same time it also has a wide application prospect.