The Platform Realization Of The Speed Estimator Based On FPGA

Today, with the rapid development of science and technology, vehicle has become theindispensable part of our daily life, whether the family car, the bus or the shuttle bus aroundbetween two cities, they all have so closed with our life and lives, traffic safety problemattracting the attention of many people, so, how to guarantee the security of the car stabilityis the main content of international and domestic academics to study, and many car securitysystem has been developed as well, for example, ACC, ABS, ASR and so on. In these activesafety system of vehicle, the reliability of system generally relies on the vehicle roll angleand the vehicle speed and accelerated speed which are the vehicle state. The speed estimatorin this article adopts an indirect method which designed and implemented on FPGA(FieldProgrammable Gate Array), and also designed the CAN communication bus in the system.Specific studies are as follows:Firstly, I study the tires of vehicle model and tyre deformation happened in the processof automobile driving state, then I build the model of eight freedom degrees for commercialvehicle in MATLAB.Secondly, I chose the UKF algorithm as the appropriate estimation algorithm after studyand research in the early speed estimation method and the advanced nonlinear estimationmethod. This algorithm is in the foundation of the vehicle discrete state equation andobservation equation and guaranteed the system state variables, then design the vehicleestimator. After finish the speed estimator, the estimator’s effectiveness and the feasibilitywould be tested in the eight freedom degrees for vehicle model.Thirdly, in the contrast to conventional digital circuit system, FPGA has the advantageof programmable, high reliability and high level of integration which suit for the speedtime-varying parameters, so I choose FPGA to realize the estimator hardware design. In thenext simulation experiment in MATLAB, as contrast the actual speed and the result, the errorcan be controlled in20%, and the estimation cycle of the estimator is58.42μs.Finally, I learned about many knowledge and details of CAN-bus, through themicrocontroller AT89C52and CAN controller SJA1000, CAN transceiver PCA82C250designed the CAN/RS-232node.