Research And Design Of Vehicle Speed Detection Based On FPGA

With the development of society,road problems are becoming more and more serious,and scholars from various countries have begun to study and try intelligent transportation systems as an important direction to improve existing road conditions and improve traffic operation efficiency.The key to realizing an intelligent transportation system is to be able to grasp road traffic information dynamically in real time.As an important traffic parameter,vehicle speed determines traffic flow information and congestion,and more importantly,it is related to driving safety.Therefore,by monitoring the speed of vehicles in real time,it can not only improve people’s travel efficiency and quality of life,but also effectively prevent traffic accidents and road congestion caused by speeding.Therefore,real-time monitoring of vehicle driving speed is one of the foundations and prerequisites for intelligent transportation system research.In this paper,this paper studies and optimizes the design of FPGA-based vehicle speed detection system.Firstly,a programmable SOC ultra-high-speed camera is designed to shoot high-speed vehicles,and realize the pre-processing of the video,obtain continuous image information without losing frames,and the high-speed camera can completely capture the motion scene through a very high frame rate and play it back at a very slow speed,which is of great significance for the dynamic analysis and prediction of moving objects.The preprocessed images are trained for object detection and improved object detection algorithms,and the main improvements include several aspects:First,the main module of MobileV3 network is used to replace the DeepSORT re-recognition network and YOLOv5’s Backnone network,which improves the speed of detection inference and improves the accuracy of target tracking.Secondly,by combining the CIoU and GIoU loss functions,the degree of GIoU degradation to IoU and accelerated convergence in some states are reduced.Finally,in the license plate recognition stage,the CRNN algorithm is used to perform undivided license plate recognition,and then the two-way LSTM network is used to realize the license plate recognition.It can be seen from the experimental results that the weight of the model is reduced and the accuracy of target tracking is improved.By comparing the speed of the vehicle in the ordinary video with the speed of the video processed by the high-speed camera,the speed accuracy of the preprocessed video is significantly improved.Finally,in order to facilitate the practical application of low power consumption,flexibility and convenience in intelligent transportation,the algorithm is embedded,and the hardware acceleration project is realized on the ZCU104 ZYNQ MPSoC series development board of Xinlinx.In the later stage,a suitable embedded development board and an improve high-speed camera output interface are selected to realize direct connection between the camera and embedded devices,further reducing the system size and improving portability.