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Design And Implementation Of Bus Lane Video Image Monitor System

Posted on:2013-09-15Degree:MasterType:Thesis
Country:ChinaCandidate:X J XuFull Text:PDF
GTID:2272330467478484Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the socio-economic developing constantly, the per capita possession of vehicles increases. Therefore, traffic congestion and other traffic problems have become serious increasingly. Priority to the development of bus lane can relieve the traffic pressure to a certain extent. But social vehicles illegal occupation of the bus lane has become a new traffic problem. The video image monitor technology combines the advanced image processing technology, computer technology and artificial intelligence. Applying it to the traffic monitor and management not only can save the manpower, but also can improve the efficiency of the traffic management. Therefore, the design of a bus lane video image monitor system has an important practical significance. The design based on FPGA can make full use of the parallelism characteristic of FPGA so that we can achieve requirement of high speed image processing. At the same time, the SOPC technology can make the design more flexible.This paper designs a bus lane video image monitor system based on FPGA. The system uses Genesys development board of Digilent as the hardware platform to monitor the road environment with CMOS image sensor. VGA displays the monitoring environment. When social vehicles drive into the bus lane, we will label the illegal invasion of vehicles with the rectangle on the monitor in order to prompt monitoring staff to deal with it.There are four modules in the whole system. They are image capture module, image cache module, image processing module and image display module. The system is designed in the way of the synergistic manner through software and hardware. The image capture, image cache and image display three modules are written by Verilog hardware description language. The image processing module is designed by the SOPC and the MicroBlaze soft core processor. Image processing module realizes the main algorithms of the system. Firstly, we convert the image to a binary image in the way of the image binary processing based on the background extraction. Secondly we handle the image by erosion operation, dilation operation and edge detection. Then we detect the lane by the improved Hough transform. And then we judge whether the lane is a bus lane by the image normalization and template matching algorithms. Finally we detect that whether there are social vehicles within the range of the bus lane. Firstly, we extract the vehicle’s position initially by the line encoding segment algorithm in vehicle detection. Secondly, we extract the vehicle’s position further by the edge detection algorithm. Finally, we label the vehicle with the rectangle. After debugged and improved repeatedly, the system can detect the positions of the lane and vehicles accurately.
Keywords/Search Tags:FPGA, SOPC, lane detection, lane judgment, vehicle detection
PDF Full Text Request
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