A Design Of Synchronous Signal Generator Based On FPGA

In recent years, application of FPGA(Field Programmable Gate Array) devices is one of the key technologies in embedded system development, and it has been widely used whether in universities or companies. Based on the high-speed digital devices, the technology of Direct Digital Synthesis(DDS) is a fully digital frequency synthesis by direct synthesis of waveforms from the concept of the signal phase. Compared with the technology of analog frequency synthesis, DDS has many advantages such as low price, stable performance, high integration and small size. In this thesis, a synchronization signal generator is designed based on FPGA as logic hardware and DDS technology as theoretical support, and its function is to produce two channels of square wave signal, respectively as the horizontal sync signal and vertical sync signal of the video signal, with frequency adjustable in real time and resolution under 0.001 Hz. The author’s major works are outlined as follows:1. Serial asynchronous communication has been studied. According to the actual needs of the project, it is the computer which controls FPGA to generate the two channels of sync signal. As the serial communication has advantages of low cost and easy realization, Universal Asynchronous Receiver/Transmitter(UART) is used as the communication interface between computer and FPGA. In this thesis, the data format, baud rate and data sampling of this communication mode have been studied, and it has been designed and implemented on FPGA.2. DDS Technology has been studied. After computer transmit the frequency values of target signal to the FPGA through serial port, signals are synthesized in the form of DDS. Therefore, in this thesis, the principle and implementation of DDS have been studied, and a module based on DDS has been built in FPGA. As the synchronous signal generator ultimately produce a square wave instead of a sine wave or a triangular wave, ROM of the DDS have been simplified and modified to make it more suitable for the needs of the project.3. All the modules have been synthesized, implemented and simulated. After the module establishment, the code needs to be converted to actual circuit by synthesis tools. In thisthesis, the synthesis tools ISE from Xilinx is used for module compiling, synthesis, place and route. When the program is downloaded to the FPGA, waveform can be observed from an oscilloscope. If a problem occurs, we can solve it by continuous program simulation and synthesis, or by visual observation of the waveform.4. The final PCB and PC program has been accomplished. After the waveform is correct, some following works such as welding need to be done. Finally, as the project requires that frequency value is inputted on PC, the source code of serial debugger is modified to implement a PC program which can successfully transmit frequency information to FPGA.