The Research And FPGA Implementation Of Data Encryption Algorithm Based On Chaos Sequences

With the development of network communication, people has paid more andmore attention on information security. Data encryption algorithm DES as blockencryption algorithm of typical, although has been exhaustive method to break,but because of the widely application of DES encryption, or have very goodfoundation, so now people are still very keen on it, trying to find solutions,extended DES key space, so the cipher text is more random, more independent,more safety, of course, more in line with the current needs of the society.This paper presents a method to extend DES algorithm based on chaoticsequences of the key space, thus a kind of chaotic deformation DES algorithm.Using a field programmable gate array (FPGA) as the hardware platform, usinghardware description language (VHDL) to realize the design of the wholesystem. Chaotic system only exists in nonlinear system, the randomness of initialvalue sensitivity and, to generate random numbers, have good application valuein the field of cryptography. Processed by chaotic sequence generated by Logisticchaotic mapping to the DES of the round key, each wheel to generate the DESalgorithm ’s key is different, DES algorithm is that chaos deformation has infinitekey space and the "one-time" feature, greatly improve the robustness of thealgorithm.In the part of design data encryption algorithm based on chaotic sequence,focuses on the chaotic sequence generated16wheel key module, single iterationcalculation module, S box transformation module, control module and moduledesign process. Methods through simulation and adaptation in the XilinxVirtex-II xc2vp30chip, has completed the hardware debugging, the runningresults show that, the hardware implementation of the encryption/decryptionalgorithm to function correctly, speed.