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Research On Optimization Technique For Hardware Transactional Memory System Based On CMP

Posted on:2014-02-05Degree:MasterType:Thesis
Country:ChinaCandidate:Q ZhangFull Text:PDF
GTID:2268330425966337Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Along with the extensive application of multicore processors, the problem of effectivesynchronization among the kernels has been an obstacle for parallel programming. Becausethat the traditional lock-based synchronization mechanism can not satisfy the requirement ofmultithread programming, transactional memory has been proposed as a new model of sharedresource synchronization. Hardware transactional memory has become one of research hotaspects in computer architecture as its strong atomicity and isolation. In recent years, moreand more experts; scholars and research institutions at home and abroad engaged in itsresearching and exploring actively. However, there are many problems occurred when thetransactions are executing in hardware transactional memory system, such as the write or readconflicts; using the fixed-size signatures; using single transaction execution mode and so on.All the problems may lead to the performance degradation of system, even deadlock.Therefore, this paper is to optimize its conflict detection and concurrency control mechanismsagainst the existing deficiencies in hardware transactional memory system, to seek areasonable and efficient transactional memory system.Firstly, this paper has a conflict detection mechanism optimization in hardwaretransactional memory system; re-design the signature structure of conflict detection used andproposes a dynamic signature-based conflict detection mechanism. The mechanism adjust thenumber of signature filter through the controller, which can satisfying the need of newlyallocated signatures; make the limited resources maximum rational use in order to decreasethe size of assigned signatures and reduce the rate of false positive. Secondly, based on thisresearch, has a optimization of concurrency control mechanism,proposing a based conflictserialized concurrency control mechanism, which serialize the trasactions occurring conflict.In this process, adopting new transactional coherence protocol; using the transaction modeselector to dynamically select the mode of transaction execution; decreasing abort rate anddelay; concurrently controlling the methods of conflict detection and resolution in order toenhance concurrency of transactions and reducing hardware and software overhead of thetransaction execution process, improving performance of hardware transactional memorysystem.Finally, in order to verify the efficiency and feasibility of optimized hardwaretransactional memory system, designing a reasonable performance testing program to test itsperformance and analyse the result. The result show that: the new based dynamic signature conflict detection mechanism can effectively overcome the shortcoming of conflict occurringfrequently and high false conflict rate in traditional mechanism. The concurrency controlmechanism based on conflict serializable reduce the transactions abort rate;reasonable trimthe execution order of different type transactions which greatly improving the performance ofhardware transactional memory system. It has a good application prospect and research value.
Keywords/Search Tags:multicore processors, hardware transactional memory, conflict detection, concurrency control
PDF Full Text Request
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