Design And Implementation Of H.264Encoding System Based On FPGA

Since H.264encoding algorithm is of great computational complexity, encoding systems based on the traditional embedded processors such as ARM can not achieve high real-time encoding, and system encoding performance is rather inefficient. Though encoding systems based on encoding DSP or encoding ICs can obtains better encoding performance, system interface and functionalitiy is fixed, resulting in poor scalability. The FPGA-based H.264encoding systems own high encoding performance and strong programmability, making up the deficiencies for the previous encoding systems. Large number of domestic and international literature suggests that some scholars have successfully implemented parts of H.264encoding structure on FPGA, and results show that outstanding encoding performance is gained. However, there is no systematic introduction to build a completed H.264encoding structure on FPGA.The paper completes all parts of intra prediction and encoding of H.264baseline profile based on FPGA, and a complete video encoding system is also designed in this paper. The main work is as followed:In the aspect of H.264encoding implementation,4×4intra luminance prediction module,8×8intra chroma prediction module,4×4integer DCT transform module,2×2Hadamard transform module, quantization module,4×4inverse integer DCT transform, inverse quantization module, CAVLC entropy encoding module, Exp-Golumb entropy encoding, reconstruction module and other modules are realized. Also some optimization is done to improve encoding efficiency. Meanwhile, this paper designs a H.264encoder IP core based on AXI-Stream interface, and a testing SoC is built up on Xilinx’s newest Zynq-7000series FPGA. Based on the SoC, this paper accomplishes Linux operating system migration, H.264encoder IP core-driven design, video capturing of USB camera, and dynamic display of QT GUI. As a result, a completed system including video capturing, displaying, encoding and storing is ceated.In the aspect of testing H.264encoding module, each module is simulated in Modelsim environment respectively, and results show that all modules functionaly work correctly and the relevant optimization is realiable. The maximum operating frequency of CAVLC entropy encoding module can work up to190MHz after synthesizing on Zynq-7000FPGA, reaching the design target of encoding high definition video. When the quantization parameter QP is28, the encoding efficiency of640×480resolution video is21.69fps, which is88.9times that of ARM platform. The compression ratio is4.94%, and the average luminance PSNR and chrominance PSNR is up to36.97dB and39.58dB respectively, meeting the encoding requirement.