Programmable Logic Device Test System

Programmable logic devices(PLDs) such as field programmable gate arrays and complex programmable logic device are commonly-used intergrated circuit devices.PLDs allow a uesr to design and operate customized sets of logic functions using a single chip.The widespread use of PLDs stems from this flexibility. Thus,a lot of units and individuals added to the filed of chip testing,which strongly promote the development of the chip testing techniques. Due to the programmable logic device is large-scale and complex,it is difficult in this case to design and product PLD by high coverage of the test automation,and the tesing is expensive because of a lot of time is deeded.At present, lots of achievements have been made on PLD testing system of different situations at home and abroad, a large number of practical testing system were made.These testing systems can be roughly divided into two categories:the first is based on independent research and testing system, generally by the host computer software, communication cable, control circuit as well as the tested PLD; The second is based on automated test equipment (ATE) platform and the ATE test platform complete mainly the function which contains pc software and control circuit, simply the ATE and tested PLD can complete the testing. The multiple configurations and testing of the tested PLD can be completed in one time by ATE, which reduce the times of the manual operation and improve the testing efficiency of the PLD, so the testing system is easy to realize about PLD manufacturing.ATE-based test platform is high efficiency and powerful, but the high price of ATE is not an ordinary units and individuals can bear, so this article is a testing system of researched and developed independently. This testing system based on a CPLD chip IsPLsilO32E as the main object of researching which made by Lattice company to study its internal structure in detail. Using three " configuration+test " to test possible faults on the chip and the basic performance indexs. The testing results meet the requirements because of which needs much less times of configuration and increases efficiency. So it is a test system of good performance and low price.The test system includes PC software, communication cable, control circuit and tested PLD. PC software sends test commands to the control circuit by communication cable, control circuit controls corresponding relay on-off according to the command of the host computer and sends a test vector, receives the test response and then returns to the host computer via the communication cable. The host computer receives the test response to analysis and display,"configuration+test "is completed. The test system is flexible and targeted, which is more suitable for research and validation.This paper is based on the main content is divided into five chapters to elaborate.The first chapter is the introduction, This part firstly introduces the background of a programmable logic device testing system, and then introduces the advantages of programmable logic devices in digital circuit design and its further development trends, several popular test methods. Secondly introduces the achievements of the foreign countries in the field of programmable devices testing system and domestic status in the related field. Finally introduces the major work done by this testing system.The second chapter is overall program design of the testing system. Firstly is the general overview of the present testing system, followed by is basic principle of the testing, which mainly includes how to do it from what and testing process.The third chapter is hardware design of system. Firstly introduces the main chip and the function of each module of the testing board designed, followed by briefly introduces the tested chip and each module of the tested circuit.The fourth chapter is software design of system. The software part includes the design of the logic functions of the programmable devices and the host computer software design. Firstly introduces the choice of the programmable logic design language, followed by is software development platforms and their respectively logic functions of the master chip and tested chip. Finally making a choice about the PC software development platform and introduces all kinds of functions of the PC software realizing.The fifth chapter is the overall implementation of the IspLsilO32E testing system, which is a key part of the testing system. Firstly introduces a complex programmable logic device CPLD, and then do a detailed analysis of the internal structure of the tested CPLD and puts forward a basic testing ideas and the basic operation flows. The last is a detailed step of the testing, and describes the used algorithm.The sixth chapter is conclusion and outlook. Firstly make a summary about the work I have completed, and then put forward my views on the further improvement of the test system from the software and hardware.