Research On The Technology And Fpga Implementation Of Digital Monitoring Receiver

With the rapid development of radio technology, monitoring and managing the radio frequency spectrum become more and more important. As the key part of spectrum monitoring equipment, digital monitoring receiver can measure the basic parameters of a radio signal in real time, thus guatanteeing the safety of the normal communications and electromagnetic environment. Every government takes a lot of manpower and material resources in the receiver research, therefore, it is of great importance to develop broadband digital monitoring receiver.Our research group develops a set of broadband digital monitoring receiver system based on Software Defined Radio, through a fully investigation of the development of receiver at home and abroad. In this dissertation, we realize the variable bandwidth Digital Down Converter, the transformation of spectrum analysis, data snapshot cache, GPS precise timing, FPGA remote update and FPGA hardware encryption and other functions. As the signal pre-processing module of digital receiver, FPGA system is the key of receiver performance.Variable bandwidth Digital Down Converter can realize17different choices of bandwidth. For processing different bandwidth, this system uses the combination of narrowband and broadband. The narrowband Digital Down Converter uses the classical structure of CIC+HB, while the wideband Digital Down Converter uses polyphase filtering structure. By combining the narrowband and broadband, it can be more effective to realize Digital Down Converter for the digital intermediate frequency signal. Spectrum analysis can realize three different types of FFT points, including512,1024and2048. It can generate amplitude spectrum and logarithmic spectrum in accordance with the user’s requirement, and pass baseband data and spectrum data back to DSP system. GPS precise timing can add a time stamp to the baseband data. With the characteristic of GPS second pulse without accumulated error and the good stability characteristic of crystal oscillator in the short time, the system realizes precise time stamp function. The validity of design is verified by the experiments. Data snapshot module can write the baseband data of different bandwidth to DDR II, read from the DDR II according to the fixed rate, transmite data through the McBSP interface to DSP, and finally transmite baseband data to the PC software for processing. FPGA remote update can reload the FPGA program by the remote PC. Hardware encryption function can protect user design from being stolen.This receiver includes RF receiver system, PC software, DSP and FPGA system. It monitors the signal spectrum through the coordination of each subsystem.