The Design Of Digital Processing System Of Transponder In New Type Identification Of Friend Or Foe

In warfare of modern information battlefield, Identification of Friend or Foe (IFF)plays an important role. The attribution of target can be identified by interrogation andreply process of IFF. Operation mode of IFF is evolved from the most basic modes(M1/M2/M3/MC) to encryption modes (M4/M5). In recent years, Mode5has beenstudied more and more for its additional signal processing methods of MSK modulation,Walsh thorthogonal spread spectrum, channnel coding, and modern encryptiontechnology. The new type IFF is based on Mode5. And therefore, high detectionprobability, great anti-interception performance, and good anti-interference ability canbe obtained.This paper describes a digital processing system of new type IFF transponder.Based on hadware architecture, the system is divided into IF processing module andbaseband processing module. And classified according to the operation mode,transponder system strcture is divided into M1/M2/M3/MC processing module andMode5processing module. The structure of this paper is mainly about the followingthree parts of design and implementation.(1) For the processing module of M1/M2/M3/MC, the interrogation signaldecoding algorithm is improved to reduce the complexity of realization, and theencoding of reply signal is designed. The signal processing of basic mode in FPGA isproposed, and the functional test is also given.(2) For the processing module of mode5signal processing, originalsynchronization algorithm of M5interrogation header is proposed and the performanceis quite acceptable even in low SNR situation. And a brand-new joint Walsh-MSKdemodulation algorithm based on Viterbi Grid is proposed for the decoding of M5data,it fully developes the gain of Walsh spread spectrum, and presents a good performanceon bit error rate. Both of the algorithms are simulated on MATLAB and realized onFPGA/DSP. The functional test is given. While at the sending path, a proposedarchitecture of AD9957and FPGA is to implement the orthogonal modulation in themode signal generation, and the functional test is given. (3) For the design of hardware structure of the new type transponder, the IFprocessing module is introduced firstly, and the design of transmitting path is the keypoint. The baseband processing module is introduced secondly, and this paper mainlyfocuses on the function of baseband chips and the interface design.After the functional test of each algorithm module, system test of the digitalprocessing system transponder is given at the end of this paper. The hardware interfacetest is presented firstly; the system test of M1/M2/M3/MC signal processing module ispresented sencondly; the real-time test of M5signal processing module is presented atlast. And the results indicate that the specifications of new type IFF are satisfied.