Mode S Response Processing, Video Processing

Secondary Surveillance Radar (SSR) is a hot issue in Radar signal processing. From traditional SSR to Monopulse SSR, a new-style SSR responder which is based on different frequencies transceiver is widely given more attention now. This responder is grounded on Mode S(Selective) technology. This thesis describes the key techniques of Mode S(Selective),basic concept and its implementation.The respondent technology of Mode S is based on the 24 bits address identifier of a plane, which could be used to detect the plane by the datalink, get the planes'property to identify, deal with the overlapping of several planes'replies. By analysis, using this the technology, true Mode S preamble will be detected correctly, pick up respondent information, process the data, in the case of high fruit(Mode A/C fruit) environments.The hardware of the respondent processing is based on FPGA+DSP structure. The Reception of Mode S and Mode A/C could be coinstantaneous, and the processing is unattached. The strongpoint of this structure is high reliability, easily being integrated, suitable for modular design, fast processing, capable of real-time processing many replies. FPGA accomplishes the video frequency processing, and DSP accomplishes the data processing.In this project, the author is responsible for the hardware implementation of FPGA. The video frequency processing is to detect the preamble of Mode S reply. The enhanced preamble detection must get the start time of the signal by the detection of Valid Pulse Position and Lead Edge. Also, exchange available data with DSP, to send reports to PC104 is the duty of FPGA.