Chip Bonding Process And Reliability Study Of System In Package

The multi-chip System in Package (SiP) integrated by CPU and Memory has Currentlybecome the3D SiP’s mainstream, and is being very representative and prospects in market.SiP as a form of a system integration package, hybrided different types of elements in thesame package by different techniques, not only can carry different types of dies, but also canachieve the same function as the system. However, the package has a higher package density,greater heating density and thermal resistance. Therefore, study of the package process of SiP,the hot and humid distribution in the SiP and their impact on the reliability has a veryimportant significance.This project is about stacking CPU and DDR chips in a SiP based on the design receivingterminal system module of the digital television (DTV). To achieve the miniaturizedsystem-level package, the plastic Ball Grid Aray (PBGA) package,3D stacked the CPU andDDR dies structure, and the wire bonding as the interconnection were selected. In this paper,the die bonding process using the non-conductive adhesive and its reliability are studied. Thecritical bonding processes in the SiP package including control of the volume of coatingmaterial and the power of pressing chips were analyzed. All the samples are applied in thesubsequent moisture test, to analyze the impact of moisture on the reliability of SiP package.Finite element analysis (FEA) software Abaqus was used to evaluate the stressdistribution on System in package (SiP). Different models were established, including thermalstress and moisture diffusion models. The models under the condition of temperature cycleanalysis were performed to estimate the stress, strain, and the possible failure modes. Underthe same thermal load condition, the material properties of the mold compound and adhesivelayer such as Young’s modulus, thermal expansion coefficient, and the thickness of chip andadhesive layer are changed to assess the impact on the stress and strain of the package.Moisture absorption analysis was performed to study the relative humidity distribution in theSiP package by placing package in the85℃/RH85%environmentfor5h,17h,55h and168h.Also moisture test was performed to study the reliability problems of the SiP package thatmay arise in the hot and humid environment. After experienced moisture pretreatment for168hours, the exterior of the package substrate and molding compound reached a saturation statusessentially. The simulation results show that the moisture related stress also has an importantimpact on the reliability of the package. The experimental results also show that, in the SiPpackage, the moisture related stress introduced in the moisture environment has an importantimpact on the reliability. Also finite element analysis (FEA) was used to model the ultra-thin multi-chip SiPpackage, the stress, strain as well as the possible failure modes under the temperature cyclingwere analyzed. The two-level orthogonal experimental design was used to study the influenceof thickness of9package components on the maximum stress on the chip, including fourchips, four adhesive film, and mold compound, and thus find the most important influencefactor to optimize the design, and ultimately achieve a optimized four-chip stacked SiPPackage structure.