A Study On The Erorr Floor Of LDPC Codes And The Improvements Applicable For IEEE802.16x Standards

LDPC(Low Density Parity Check) codes with an excellent performance approachingthe Shannon limit have achieved successful applications in IEEE802.16x. The LDPC codes’error floor phenomenon have been become a bottleneck problem which is needed to besolved in fourth generation of mobile communications standards (4G).In this thesis, the specific work are as the follows.Firstly, the basic concept of LDPC codes had been introduced in this thesis at first of allas well as the development of LDPC codes in channel coding, the concept of IEEE802standard and IEEE802.16x LDPC codes had a detailed introduction in this part. And thensome of the LDPC codes’ coding and decoding algorithms had been introduced. After that,based on the analysis of the relationship between decoding algorithms and trapping sets,trapping sets and error floor, the concept of trapping sets and error floor had been expounded,the mechanism analyses which were based on trapping sets of error floor and the decodingalgorithms which could reduce the error floor were also expounded.Secondly, on the basis of these existing coding-decoding algorithms, this thesisproposed a new kind of coding-decoding algorithm——deleting trapping bitscoding-decoding algorithm, and made it suitable for IEEE802.16x LDPC codes. In this part,the error floor reducing algorithms were mainly investigated. Stopping sets, absorbing setsand trapping sets are the main causes of error floor phenomenon. Stopping sets andabsorbing sets could be seen as trapping sets under certain circumstance. Therefore, if thedistribution of dominant trapping sets can be obtained from LDPC codes’ performancesimulation and in the decoding process these trapping sets’ position can be skipped orbypassed, the error floor could be reduced or even eliminated. Deleting trapping bitscoding-decoding algorithm got3points:(1)By known the dominant trapping sets, these bits were fixed as”1” or “0” and deletedbefore sending in coding side;(2)When the deleted sequences were received in the decoding side, insert those bits insitu and make the sequences complete for decoding;(3)Fix the likelihood value of those bits during the decoding iteration.Thirdly, this thesis mainly deals with simulation’s performance and analysis ofIEEE802.16x LDPC codes under the application of trapping bit deleting algorithm. Althoughthe coding rate would be affected after using the algorithm, the algorithm do achieve thereducing goal, the error floor could be expected less than10-11.