Font Size:
a
A
A
Keyword [Error Floor]
Result: 1 - 20 | Page: 1 of 3
1.
Study On The Encoding & Decoding Of Turbo Codes And The Performance Of RS-Turbo Concatenated Codes
2.
Design Of Low-Density Parity-Check Codes
3.
Research On Construction And Decoding Performance Of Low-Density Parity-Check Codes
4.
Study On Pragmatic Encoding And Decoding Of Turbo Codes
5.
Research And Simulation In AWGN Channel Of A New TURBO Code Encoding And Decoding Structure
6.
Principles Of The Codec For LDPC Codes And Its Hardware Implementation
7.
Channel Coding Based On Crossover Structure And Its Hardware Realization
8.
Study Of Averaged Iterative Decoding Algorithm
9.
Construction Of LDPC Codes Based On Circulant Permutation Matrices
10.
Dynamic Schedule Algorithm For Sum-product Decoding Of LDPC Codes
11.
Research And Implementation Of Concatenated Code About China Digital Television Multimedia Broadcasting
12.
Research On Construction Of LDPC Codes With Low Error Floor
13.
Research On Construction Of Ldpc Codes With Low Error Floor
14.
Constructions Of Quasi-Cyclic Low-Density Parity-Check Codes Based On Integer Sequences
15.
Technology Studies And Performance Analysis On Turbo Codes In Wireless Communication
16.
Research On Construction And Decoding Algorithm With Low Error Floor Of LDPC Codes
17.
Research On LDPC Codes With Low Error Floor Based On Graph Covers And Cyclic Liftings
18.
Research On Decoding Performance Of LDPC Codes With Low Error Floor
19.
Research On Decoding Algorithmes And Construction Of Check Matrix Of Structurd LDPC Codes Constructed Algebraically
20.
Research On Key Technologies Of Construction And Decoding For LDPC Codes In Deep-space Communication
<<First
<Prev
Next>
Last>>
Jump to
