Design And Implementation Of The Arithmetic Units For64-bit Stream Core

The integration of the traditional multi-core processors (such as CPU) and the streamprocessors (such as GPU) has become the trend of the development of multi-coreprocessors. However, the heterogeneous structure leads to the high power, and thebottleneck of the communication is produced by the separation of storage, so theHomogeneous General Purpose Stream Processor (HGPSP) architecture is proposed. Inthe architecture, the four stream cores that shared frontend make of a stream multi-core,and the number of the stream core for CPU and SP is decided by the application. TheHGPSP is not only needed to face the high-performance computing applications, butalso is requested to deal with the graphics quickly, which demands of the highperformance for arithmetic units of the process.The design and the implementation of the arithmetic units for64bits stream core areaccomplished, and the main work and innovations as follows:First of all, as for the integer arithmetic units, making use of the characteristics of thenarrow data bits wide in the graphics processing fully, the design of the addition/subtraction unit and the multiply unit are completed, and the leading zero logic in thefloating-point units is shared to operate of the different bits wide flexibly, so as to makeuse of the resource effectively and reduce the computational delay. And the design andthe implementation of the compare unit, shift unit and division unit in the integer unitsare completed with the VHDL code.Second, as for the floating-point units, the addition/subtraction unit, multiply unit,floating-point/integer conversion unit, division unit, extraction unit for thefloating-point operations are completed. In addition, the design of the pipelining isaccomplished for some floating-point units, such as addition/subtraction unit, multiplyunit, floating-point/integer conversion unit, what increases the performance of thefloating-point units.Finally, the system verification platform is designed for the64bits stream core withthe ISE12.1software of Xilinx company. And the function of the units is verified byexecuting the testbench, otherwise the pipeline of the floating-point units is verified byexecuting the binary code of the instructions. The result of the verification shows thearithmetic units work well and correctly in the system, and the correlative performanceparameters of the arithmetic units are got from the synthesis by the softwareautomatically.