| With the rapid popularization of information security technologies, cryptographic algorithms have been used in more and more domains. There are two traditional ways to implement these algorithms in security embedded systems. One is to implement them directly by using program in a General Purpose Processor (GPP). It’s very flexible but it’s also very time-consuming in this way, so it has become much more unacceptable especially when the intensity of these algorithms goes up. The other is to devise a dedicated hardware accelerator (ASIC) for each algorithm. There is no need of complex program, and it can reach high performance. But high cost, high complexity of system and bad flexibility also come with this kind of method. So, in order to overcome these limitations, security processor has been proposed recently. As a new proposed solution, security processor combines both of the high flexibility of GPP and high performance of ASIC. It can be very low cost, so it’s very suitable for cryptographic algorithms.An application specific instruction set is adopted by this paper. A low-cost, high-performance application specific instruction set security processor is proposed in this paper. This processor is suitable for several kinds of embedded security systems.This paper analyzes the cryptographic algorithms, such as RSA, AES and SHA-1. It distills and optimizes the critical steps of these algorithms. As to the processor’s architecture, this paper optimizes the data path of processor, adds minimal hardware to accelerate the execution of these critical steps. This kind of architecture can achieve both of the high performance of hardware and high flexibility of software.A SoC testing platform is devised to support the design methodology of this paper. Based on SMIC 0.18μm standard CMOS technology, the proposed SoC testing platform achieves the goal of high-performance, high-flexibility and low-cost. Therefore, it has a good prospective for application in security embedded systems. |
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