A Series Resistance Model For Polycrystalline Silicon Thin Film Transistors

A physical based series resistance (Rs) model is first proposed to accurately model theRsof poly-Si thin film transistors (TFTs). By detailed analysis into the gate to source/drainoverlap region (the lateral diffusion of source/drain doping into the intrinsic channel), threeeffects are comprehensively considered in the overlap region, namely, the gate bias (Vg)induced carrier accumulation, current path spreading, and carrier thermionic emission overgrain boundaries are adequately included. The model precisely predicts the nonlinear Vgdependent Rsbehavior and nicely fits the experimental data, and this model is verified onboth metal induced lateral crystallized (MILC) and excimer laser annealed (ELA) poly-SiTFTs. In addition, we conducted a futher optimization of this model, an explicit analyticalexpression of Rsis derivated to further clarify its dependencies on device parameters.Subsequently, approaches to reduce the series resistance of poly-Si TFTs are raisedaccording to proposed our model.