The Study On Copper Electro-deposition In Through Silicon Vias

Nowadays, the super-filling of high aspect ratio through silicon vias (TSVs) is a technical challenge for3D integration. It had been said that copper electro-deposition accounted for almost40%of the total TSV cost. Due to the complexity mechanism of additives in the plating bath that the copper plating technology should be further investigated.In this paper, firstly, a numerical model was firstly developed to investigate the through via bottom-up copper electro-deposition with accelerator. The simulation results with and without accelerator were compared, besides, the effect of concentration, diffusion coefficient and adsorption coefficient were considered for better understanding the mathematic model.Secondly, the paper had shown the copper electro-deposition simulation without any additives and pinch-off effect had been achieved. It was not allowed by the TSV copper plating process. To solve this problem, a model with accelerator and suppressor had been investigated. By changing the concentration ratio between accelerator and suppressor, void,’V shaped and seam phenomenon had been achieved, which can support an effective simulation procedure for super-filling with variety of additives for high aspect ratio TSVs. With further explored the mechanism of additives,’U’shaped filling process had also been given. The simulation can predict the behavior of copper electro-deposition.Finally, the simulations of the bottom-up copper electro-deposition are verified by experiment results. TSVs with diameter of20μm and depth of200μm without voids or seams have been achieved in the experiments. Besides, it had been found that the poor TSV etch profile can have a great influence on the quality of Cu seed, which can makes the copper plating experiment failed.