Dynamic Receiver Design And Key Technology Realiz Ation Based On Cognitive Radio

The importance of the RF front-end for wireless receiver gets more and more attention in theprocess of the development of the wireless communications technology,and cognitive radio sets ahigher request to the RF front-end of receiver. This paper designs a dynamic receiver scheme forcognitive radio system. The dynamic receiver has a operating frequency range of700~800MHz,its maximum channel bandwidth is8MHz, and is divided into twelve channels.The receiver hasscanning channel and receiving channel two parts, the two parts can be independently operatedsimultaneously.While scanning, the frequency of the local oscillation signal steps1MHz,stabilization time is less than50microseconds; and when the channel receiving signals, stabilizationtime does not exceed100microseconds when the hopping spacing50MHz. The requirements forthe receiver is to realize the detection and reception of the signal with a large dynamic range of thesignal strength.The receiver uses the digital intermediate frequency receiver structure,takes thehigh-speed ADC and FPGA are for post-stage digital signal processing, and devices it takes canmeet the requirements of high-speed broadband wireless communication.The main work and innovations are as follows:(1) Make analysis and comparation of the structure of the commonly used receivers, and the performance parameters of the RF front-end that used in cognitive radio dynamic receiver are given. The program that using dual-channel receiver was proposed to meet cognitive radio’s real-time detection on spectrum, and not to affect the normal operation of the receiver at the same time, one of the dual-channel as the receive channel to complete the normal communication functions, another one asthe scan channel, to detect the channel spectrum voids to guarantee spectrum voids’ real-time dynamic access.(2) Design and make simulation of the key modules of the RF front-end. Mainly include: make simulation of low-noise amplifier circuit by RF circuit simulation software ADS2009. The bias circuit and matching network design is mainly finished to get gain of20dB when low noise on the700~800MHz band, gain flatness is less than1dB in frequency band, the noise figure is1.3. Mixer, IF filter and IF variable gain amplifier circuit design are given.(3) A frequency synthesizer which used to generate local oscillation signal with characteristicsof frequency agile is designed and implemented，it using direct digital frequency synthesizer (DDS)directly drive phase-locked loop (PLL) architecture, and makes combination the advantages of fast frequency conversion speed of the DDS and the wide output frequency band, low output spurious ofPLL, thus able to satisfy the hopping switching time requirements of the receiver.