The Research Of Topology In Networkon Chip

With the development of Semiconductor technology, the integrity of SoC(Systemon Chip) has also been improved. Multiple IP cores in SoC connect to each other basedon the traditional bus architecture, as circuit scale growing up, the method has beenunable to satisfy communication among IP blocks. In order to solve the shortage of businterconnection architecture, NoC(Network on Chip) as a new solution was proposed.NoC achieve the separation of communication and computing and effectively improvethe performance of SoC. Topology and routing algorithm are two key area of NoCtechnology. NoC topology defines the layout and the way of interconnection betweennodes and links, which influenced the information transmission speed, performanceparameters such as average latency, routing algorithm and other areas.This paper mainly studied the topology of NoC and deep analyzed the advantagesand disadvantages of many topologies. This paper simple introduce the basicknowledge that research on NoC needed, including performance parameters, exchangemechanism, routing algorithm and deadlock and so on. Furthermore, we take deepresearch on some typical topologies such as Mesh, Torus, Octagon and BFT et al, andwe also analyze their advantages and disadvantages. An improved strategy to Meshnamed VMesh was proposed to solve the problems of the large average latency and thelong diameter in Mesh. This structure interconnect the switching nodes that is the fourvertices of Mesh by adding six long links. On this basis, a deadlock-free routingalgorithm named VXY algorithm based on VMesh structure is proposed. By theoreticalcalculation, it is certificated that this structure has advantages on some performanceparameters such as diameter, ideal average latency and ideal throughput. And thispaper emulates Mesh and VMesh through gpNoCsim simulator, the experimental resultshow that, VMesh has a better performance than Mesh in average delay and averagedistance.