The Design Of The High Psrr Low Consumption"

With the increasing popularity of portable electronic devices, IC domain for power management chip increasingly stringent requirements of power supply management market, as one of the main LDO for electronic devices enhance performance have a great impact on the role, LDO performance will directly affect the follow-up circuit module design, so the study on high performance LDO has tremendous practical value.This paper introduces the design of a high PSRR (PSRR) low power LDO, it uses SIMCO.18um CMOS process, has very good power supply rejection ratio, the low frequency of PSRR under5.5V voltage of more than-100dB, other voltage is more than80dB; high frequency PSRR in all voltage is above-50dB, and LDO has a very wide range of input voltage,2.0V-5.5V can work normally, the output voltage is1.5V, the maximum load can be above30mA. Design to take full account of the low power requirements, the final addition to bandgap reference source module, LDO static power consumption is only less than50uA.This article first introduced the LDO basic working principle and main design parameters of LDO, stability analysis, including the frequency compensation and analysis of PSRR, then the circuit of the module design are introduced, including band gap reference source for the analysis of PSRR, an error amplifier and a power tube selection analysis, and introduces the frequency compensation method, finally using the Cadence simulation software for circuit simulation analysis, given the design of performance parameter. The simulation results show that the designed circuit can meet the design target, accord with the anticipation of the design.At the end of this paper are summarized, and the circuit design is put forward to improve the target.