Research On OFDM Synchronization Algorithm And Implementation Of FPGA Based On IEEE802.11a

OFDM is a technology of multi-carrier modulation which has the advantages ofhigh spectrum efficiency, well anti-multipath ability and low bit error rate. As a coretechnology of the future wireless communication system, it has already been used in4Gsystem. With so many advantages, there are also two defects: high peak-to-average ratioand sensitivity of carrier frequency offset. As a important technology of OFDM,synchronization technology makes the carrier frequency offset compensated and let thewindow position of FFT fixed so as to guarantee the accuracy of FFT.In this thesis, symbol timing synchronization and carrier frequencysynchronization based on IEEE802.11a are deeply researched. For the synchronizationalgorithm based on the burst transmission system, three kinds of typical framesynchronization algorithm are simulated and analyzed by the way of contrasting thejudgment value and threshold. When the channel environment is more severe, thejudgment of the peak is not obvious and even disappears in the Energy detectionalgorithm and double sliding window algorithm due to the feature based on the energy,so it is hard to determine the threshold. Delay correlation is a algorithm improved bySchmidl&Cox algorithm, and it makes the computation of Schmidl&Cox algorithmreduced and threshold selection convenient. So the delay correlation can beimplemented in theory. For carrier synchronization algorithm, the carriersynchronization algorithm of time domain is researched. Comparing the advantage andinferiority of using the two training symbol, the short train symbol is more proper forfrequency offset estimation and a improved method based on short train symbol isproposed in the average form of time domain algorithm. With the limited resource ofthe training symbol, the improved algorithm can make more calculations of averaging.The simulation results show that the improved algorithm meets the need of the precision,so it is a feasible algorithm. For the hardware implementation, the development board ofSpartan-3E, Verilog and ISE are used as a development enviroment, and the framesynchronization, carrier synchronization, as well as the whole synchronous receivingsystem are designed with the tools above on. With an idea of modules, a module designis made from the under to top. The results of functional simulation and the signals on theboard viewing shows that frame synchronization and carrier synchronization can be run on the hardware well, and the improved algorithm is much better than the originalalgorithm.