Embedded Multi-processor System Communication Mechanism Research Based On PCI Interconnect

In computing-intensive applications like security, image processing, speechrecognition, network communication etc, the speed-enhancement performance ofmarketing single-chip embedded processor often cannot meet people`s needs. Applicationdevelopers tend to choose a program called embedded multi-processors, which usecertain ways to interconnect multiple pieces of single embedded processor. Withchip-level parallel design and software co-processing, this program can achieve theperformance multiplier effect. In all interconnect ways, PCI bus, with its high bandwidth,versatility, maturity and low cost, is particularly impressive. This paper mainly studies theobject of PCI-based embedded multi-processor system, and is more focus on the coreinter-chip communication mechanisms.At first, this paper describes an embedded multi-processor communication theoryand summarizes the advantage of PCI interconnection by comparing the feature andscope of dual-port RAM, Ethernet bus, PCI bus and meshes architecture interconnections.On this basis, the main issues to be resolved of PCI interconnection are brought up. Thenthis paper analyzes the existing TCP/IP over PCI program and lacks a common design forconcurrent embedded multi-processor communication model. The model is based on PCImemory map, by discussing a series of core issues like channel division, message format,data transfer mechanism, management mechanism etc, it propose a completeendpoint-to-endpoint communication solution based on PCI. The model can meetefficient, concurrent, inter-process communication needs across CPU nodes. After that,this paper gives a detailed implementation and test of the model on linux-2.6.14kerneland Hi3511dual processor system. At last, this paper analyzes the test results andprospects the next phase research.